Gate Stack Engineering for Emerging Polarization based Non-volatile Memories - Paperback

by Milan Pesic (Author)

The hafnium based ferroelectric memories offer a low power consumption, ultra-fast operation, non-volatile retention as well as the small relative cell size as the main requirements for future memories. These remarkable properties of ferroelectric memories make them promising candidates for non-volatile memories that would bridge the speed gap between fast logic and slow off-chip, long term storage. Even though the retention of hafnia based ferroelectric memories can be extrapolated to a ten-year specification target, they suffer from a rather limited endurance. Therefore, this work targets relating the field cycling behavior of hafnia based ferroelectric memories to the physical mechanisms taking place within the film stack. Establishing a correlation between the performance of the device and underlying physical mechanisms is the first step toward understanding the device and engineering guidelines for novel, superior devices. In the frame of this work, an in-depth ferroelectric and dielectric characterization, analysis and TEM study was combined with comprehensive modeling approach. Drift and diffusion based vacancy redistribution was found as the main cause for the phase transformation and consequent increase of the remnant polarization, while domain pinning and defect generation is identified to be responsible for the device fatigue. Finally, based on Landau theory, a simple way to utilize the high endurance strength of anti-ferroelectric (AFE) materials and achieve non-volatility in state-of-the-art DRAM stacks was proposed and the fabrication of the world's first non-volatile AFE-RAM is reported. These findings represent an important milestone and pave the way toward a commercialization of (anti)ferroelectric non-volatile memories based on simple binary-oxides.

Author Biography

In 2011 Milan Pesic obtained B.Sc. in Electrical Engineering and Computer Science at University of Belgrade. Afterwards, in 2013 he received the M.Sc. in Nanoelectronics systems at the Faculty of Electrical Engineering of Technical University of Dresden, Germany. Since 2014, he has been pursuing a Ph.D. degree in the Nanoelectronic Materials Laboratory NaMLab gGmbH and at Technical University of Dresden, Germany. He defended his Ph.D. thesis with highest honors in May 2017. His research activities are in the field of non-volatile memories. Particularly, his interests are the oxide reliability, ferroelectrics, neuromorphics, characterization and modeling of emerging non-volatile memories as well as the energy efficient electronics (steep-slope device).